Architectural design and FPGA implementation of radix-4 CORDIC processor

Kaushik Bhattacharyya; Rakesh Biswas; Anindya Sundar Dhar; Swapna Banerjee

doi:10.1016/j.micpro.2010.01.002

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Architectural design and FPGA implementation of radix-4 CORDIC processor

Kaushik Bhattacharyya Rakesh Biswas Anindya Sundar Dhar Swapna Banerjee

Year: 2010 Journal: Microprocessors and Microsystems Vol: 34 (2-4)Pages: 96-101 Publisher: Elsevier BV

DOI: 10.1016/j.micpro.2010.01.002

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Keywords:

CORDIC Computer science Field-programmable gate array Latency (audio) Clock rate Throughput Architecture Parallel computing Computer hardware Power consumption Embedded system Power (physics) Chip Operating system Wireless

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Numerical Methods and Algorithms

Physical Sciences → Computer Science → Computational Theory and Mathematics

Low-power high-performance VLSI design

Physical Sciences → Engineering → Electrical and Electronic Engineering

Parallel Computing and Optimization Techniques

Physical Sciences → Computer Science → Hardware and Architecture

Architectural design and FPGA implementation of radix-4 CORDIC processor

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