A dynamically reconfigurable architecture VSP-DR1 for video processing is proposed in this paper. This architecture is derived from years of engineering video ASICs and is ideally suited to real-time video streaming. The various cells of the architecture are optimized for video post processing. The architecture, along with its video application, can be used in many real-time video applications.
R.R. ShivelyElijah MorganT. W. CopleyAllen L. Gorin
H. NavarroJuan A. Montiel–NelsonJ. SosaJosé C. GarcíaRoberto SarmientoSaeid Nooshabadi
Valeri KirischianVadim GeurkovLev Kirischian