JOURNAL ARTICLE

Video Stream Processing on a High Performance Reconfigurable Architecture

Abstract

A dynamically reconfigurable architecture VSP-DR1 for video processing is proposed in this paper. This architecture is derived from years of engineering video ASICs and is ideally suited to real-time video streaming. The various cells of the architecture are optimized for video post processing. The architecture, along with its video application, can be used in many real-time video applications.

Keywords:
Computer science Video processing Architecture Computer architecture Stream processing Application-specific integrated circuit Embedded system Real-time computing Computer hardware Operating system

Metrics

0
Cited By
0.00
FWCI (Field Weighted Citation Impact)
14
Refs
0.07
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Topics

Embedded Systems Design Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Video Coding and Compression Technologies
Physical Sciences →  Computer Science →  Signal Processing
Interconnection Networks and Systems
Physical Sciences →  Computer Science →  Computer Networks and Communications

Related Documents

JOURNAL ARTICLE

High-performance VLSI architecture for video processing

H. NavarroJuan A. Montiel–NelsonJ. SosaJosé C. GarcíaRoberto SarmientoSaeid Nooshabadi

Journal:   Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE Year: 2003 Vol: 5117 Pages: 175-175
JOURNAL ARTICLE

Cost effective reconfigurable architecture for stream processing applications

Valeri KirischianVadim GeurkovLev Kirischian

Journal:   Conference proceedings - Canadian Conference on Electrical and Computer Engineering Year: 2008 Pages: 000541-000546
BOOK-CHAPTER

Reconfigurable Stream-Processing Architecture for Sparse Linear Solvers

Kevin CunninghamP. Nagvajara

Lecture notes in computer science Year: 2011 Pages: 281-286
© 2026 ScienceGate Book Chapters — All rights reserved.