Implementation of high performance Readout Integrated Circuit

Abstract

The Readout Integrated Circuit (ROIC) consists of charge integration, charge to voltage conversion, Pixel voltage multiplexing, signal transfer and amplification stage. The control circuit manages all the sequential events from charge integration to amplification stage. The large dynamic range requirement is the most challenging aspect in modern CMOS process. The infrared (IR) detectors looks for the integration of large charge handling capacity more than 10Me̅, at the same time sensitive enough to detect signals just above the noise floor of better than 900e̅. The ROIC's uses a capacitor along with active elements for signal integration and processing. The amount of charge collected is defined by the charge handling capacity and limited by the size of integrating capacitor. In addition to this, signal processing also requires multiple large capacitors, which lead to complex tradeoffs, as all these must fit within the pixel size dictated by the requirements of IR detectors. Detectors operate with relatively high bias voltage, which further complicates interface design and silicon process selection. This paper discusses design optimization and implementation of direct injection ROIC. The 4×4 array ROIC test chip has 10 Me̅ charge handling capacity , maximum pixel pitch of 30μm, snapshot mode of operation, variable integration time, 3 Mega pixels per second (Mpps) readout rate and readout noise of 350e̅ reported at ambient temperature for the first time.