A high performance CMOS readout integrated circuit for IRFPA

Abstract

A high performance, 128×128 pixel, snapshot Readout Integrated Circuit (ROIC) for IRFPA has been fabricated with 0.5μm Double Poly Double Metal (DPDM) n-well CMOS process. The pixel cell circuit uses an improved direct injection structure with only four transistors to maintain large enough integration capacitror. One pixel cell occupies an area of 50×50μm². Each row's pixel signals are readout to the column amplifiers row by row in parallel, while the column amplifiers are reset after each row's pixel signals are readout. The whole pixel cells are reset wholly after a frame signals are all readout. The ROIC structure also provides dynamic image transpositionxinyuanjing xinyuanjing xi (Invert, Revert) function to support a wide range of system requirements. It still has a build-in temperature sensor to detect the temperature of the chip. The measurement results show that the readout chip works well at both room temperature and 77K with 5V supply voltage. The fabricated chip has a maximum charge storage capacity of 6.48×10⁷ electrons and the active power dissipation of about 10mW. The proposed CMOS ROIC structure has been applied to IRFPAs.