JOURNAL ARTICLE

Flexible speech synthesis using a single chip system

J. Reimer

Year: 1984 Journal:   The Journal of the Acoustical Society of America Vol: 76 (S1)Pages: S2-S2   Publisher: Acoustical Society of America

Abstract

Speech system design has been limited in the past by power consumption considerations, data format versus system interface trade-offs, and general system complexity in multi-chip systems. A CMOS speech synthesizer/ROM/processor, recently designed, solves these problems. The device consists of an 8-bit speech processor, 8K bytes of ROM, LPC-10 lattice filter, and a pulse width modulating D/A. The general purpose data I/O port is designed consistent with TTL interface requirements and may be directly interfaced to four- and eight-bit microprocessors and also used directly with a key matrix. Since the chip has an onboard ROM, it provides a single chip system for many speech applications. The programmability of the speech processor in the device makes it sufficiently flexible to process various speech data formats to achieve specific synthesis requirements.

Keywords:
Computer science Byte Chip Interface (matter) Computer hardware Serial port Voice activity detection Embedded system Speech processing Speech recognition Serial communication Telecommunications Operating system

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Topics

Speech Recognition and Synthesis
Physical Sciences →  Computer Science →  Artificial Intelligence
Speech and Audio Processing
Physical Sciences →  Computer Science →  Signal Processing
Advanced Data Compression Techniques
Physical Sciences →  Computer Science →  Computer Vision and Pattern Recognition
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