This work presents a novel floor planner tailored for Partially-Reconfigurable FPGAs having an arbitrary distribution of heterogeneous resources. The proposed approach precomputes a set of feasible placements for each of the reconfigurable regions, thus allowing the designer to set a preference on the types and positions of the desired areas. Then, the core of the approach is based on a Mixed-Integer Linear Programming (MILP) formulation which exploits constraints derived from a conflict graph to prevent overlapping between areas. Experimental results have shown that the defined approach leads to an average 11% improvements in the objective function value w.r.t. The state-of-the-art solutions under the same limited time budget.
Marco RabozziGianluca DurelliAntonio MieleJohn LillisMarco D. Santambrogio
P. BanerjeeMegha SangtaniSusmita Sur‐Kolay
Nan LiuSong ChenTakeshi Yoshimura
Jinyu WangYifei KangWeiguo WuGuoliang XingLinlin Tu
Ramzi AyadiMed Lassaad KaddachiYassine Bouteraa