JOURNAL ARTICLE

A methodology for SystemC algorithmic model verification applying MATLAB

Abstract

In this work, we propose a methodology for verifying SystemC algorithmic model applying MATLAB, which enables effective stimuli generation, result analysis and visualization. Two methods are presented with examples given. One is to employ MATLAB as a computation engine. In this scheme, MATLAB is evoked, executed and terminated from within SystemC testbench. SystemC testbench invokes MATLAB engine to execute MATLAB commands and functions, through which the needed stimuli are generated and fed to SystemC model under test. The output is then collected for analysis and visualization after execution. The other is to use MATLAB as the test I/O for SystemC model. In this manner, the stimuli for the SystemC model are extracted from MATLAB and output results of the SystemC model are written to a MATLAB MAT file for comparison and analysis in MATLAB.

Keywords:
SystemC Computer science MATLAB Programming language Formal verification Computer architecture Embedded system Parallel computing

Metrics

5
Cited By
0.24
FWCI (Field Weighted Citation Impact)
0
Refs
0.47
Citation Normalized Percentile
Is in top 1%
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Citation History

Topics

Embedded Systems Design Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
VLSI and Analog Circuit Testing
Physical Sciences →  Computer Science →  Hardware and Architecture
Fault Detection and Control Systems
Physical Sciences →  Engineering →  Control and Systems Engineering
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