Low voltage CMOS analog integrated circuit design

Abstract

Designing analog circuits that can operate from low supply voltages has become of increasing importance in recent years. The rapid growth of battery operated portable devices and biomedical implant systems require low power dissipation to achieve long battery life and minimum battery size. The ever-increasing trend in the density of integrated circuits and smaller feature sizes has necessitated the supply voltage to be scaled down in order to reduce power dissipation and maintain reliability. Reducing supply voltage is one of the most effective ways to achieve low power dissipation. Within these low voltage integrated circuits, the analog circuits are always suffering from poor performance and become the bottleneck of the system. The objective of this thesis is to develop circuit techniques for the realisation of high performance low voltage CMOS operational amplifiers and digital-to-analog converters. In order to support the digital-to-analog converter and other mixed-signal systems, high speed and low voltage digital logic circuit technique was also developed for standard CMOS process. By studying both conventional and recent developments in analog circuit designs, reduction in supply voltage is always limited. Due to the fundamental limitation of transistor threshold voltage, alternative design techniques must be employed to further reduce the supply voltage. Several novel circuit techniques have been proposed in this thesis to regain circuit performance under low voltage condition. These include the reduction in transistor stacking to maximize the gate-source voltage, the use of floating-gate devices to perform dual functions in a single transistor, and by driving the back gate of a transistor to explore the extra current flow. Three operational amplifiers, three digital-to-analog converters and some high-speed digital circuits have been designed and fabricated to demonstrate the feasibility of the proposed techniques. All designed circuits are operated in genuinely low voltage as neither low threshold devices or charge pump circuitry is used. Experimental results are presented to show that supply voltage range from as low as 0.9V is sufficient.