JOURNAL ARTICLE

IMPLEMENTATION OF CASCADED ARCHITECTURE FOR MEMRISTOR CROSSBAR ARRAY BASED NEUROMORPHIC COMPUTING

Dr. P. G. KuppusamyV.UdayT.S.Tharun SaiG.YashwanthG.Tejaeshwar RaoT.Sai Lakshman Naidu

Year: 2025 Journal:   Zenodo (CERN European Organization for Nuclear Research)   Publisher: European Organization for Nuclear Research

Abstract

Neural networks, one of the main artificial intelligencetechnologies today, have the computational power andlearning ability similar to the brain. However,implementation of neural networks based on theCMOS von Neumann computing systems suffers fromthe communication bottleneck restricted by the busbandwidth and memory wall resulting from CMOSdownscaling. With the advances of nanotechnology,the memristors based designs have been widely used inmany applications such as mixed- signal design, nonvolatile memories, CNN- Architectures. Multiplyaccumulate calculations using a memristor crossbararray is an important method to realize neuromorphiccomputing. However, the memristor array fabricationtechnology is still immature, and it is difficult tofabricate large-scale arrays with high-yield, whichrestricts the development of memristor-based neuromorphic computing technology. Therefore,cascading small-scale arrays to achieve theneuromorphic computational ability that can beachieved by large-scale arrays, which is of greatsignificance for promoting the application ofmemristor-based neuromorphic computing. Toaddress this issue, we present a memristor-basedcascaded framework with some basic computationunits, several neural network processing units can becascaded by this means to improve the processingcapability of the dataset.

Keywords:
Neuromorphic engineering Memristor Von Neumann architecture Bottleneck Artificial neural network Crossbar switch In-Memory Processing Signal processing

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Topics

Advanced Memory and Neural Computing
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Physical Sciences →  Computer Science →  Artificial Intelligence
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