Abstract

Speedups due to technological advances in solid state electronic design are reaching theoretical limits. To get around these limits, researchers have considered concurrent processing of data as a promising alternative for achieving speedups proportional to the level of concurrency. During the past decade, many multiprocessor architectures have been proposed to obtain such speedups. However, the desired speedups have not been realized because of a limited understanding of issues in designing efficient parallel algorithms and in designing interconnection networks and their interactions. Recently, many parallel algorithms have been designed based on a theoretical shared memory model, the Parallel Random Access Machine (PRAM) [124], in which a unit-delay interconnection network is assumed. \nIn practice, interconnection networks introduce a delay factor in the implementation of parallel algorithms. The main issues in the design of such interconnection networks have been routing delay, communication bandwidth, hardware cost, and ease of control. Traditionally electronic interconnects have been used. \nHowever, with advances in optical technology, it is likely that photonics will play an important role in parallel computation. This thesis focuses on possible realizations of unit-time interconnection network using free space optics. \n \n

Keywords:
Very-large-scale integration Computer science Computation Computational complexity theory Chip Hierarchy Parallel processing Computer engineering Parallel computing Electronic engineering Computational science Embedded system Telecommunications Algorithm Engineering

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Topics

Semiconductor Lasers and Optical Devices
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Optical Network Technologies
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Advanced Optical Network Technologies
Physical Sciences →  Engineering →  Electrical and Electronic Engineering

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