Hardware Architecture for Convolutional Neural Network with Memristor-Bridges

Abstract

Integration of memristors into neuromorphic systems is receiving substantial attention due to their potential to facilitate energy-efficient and highly parallel in-memory computation. In this paper, a memristor-bridge based design for the convolution operation of convolution neural network (CNN) and its crossbar realization are developed. A LeNet-5 network is realized using the proposed design and tested on the MNIST dataset. The architecture includes circuit configurations for activation and pooling operations. The weight-mapping procedure for the memristor-bridges is developed in relation to the exact physics of conduction mechanism of memristor. Efficient modeling of the devices results in excellent performance of the network, achieving up to 99.08% inference accuracy. Isolation among the bridges and parallelization of the convolution operation leads to a rapid mapping within 0.11[Formula: see text][Formula: see text] and fast response in less than 20[Formula: see text][Formula: see text]. The overall energy consumption by the memristor units during mapping and inference remains well below [Formula: see text].