A Reconfigurable Floating-Point Compliant Hardware Architecture for Neural Network Implementation

Abhishek Yadav; Abhishek Dixit; Utsav Jana; Bınod Kumar

doi:10.1109/ises63344.2024.00031

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A Reconfigurable Floating-Point Compliant Hardware Architecture for Neural Network Implementation

Abhishek Yadav Abhishek Dixit Utsav Jana Bınod Kumar

Year: 2024 Pages: 104-109

DOI: 10.1109/ises63344.2024.00031

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Keywords:

Computer science Computer architecture Architecture Field-programmable gate array Floating point Computer hardware Artificial neural network Embedded system Operating system Artificial intelligence

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Neural Networks and Applications

Physical Sciences → Computer Science → Artificial Intelligence

A Reconfigurable Floating-Point Compliant Hardware Architecture for Neural Network Implementation

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