An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3

Tsung‐Han Tsai; Nai-Chieh Tung; Chun‐Yu Chen

doi:10.1007/s00034-024-02968-9

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An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3

Tsung‐Han Tsai Nai-Chieh Tung Chun‐Yu Chen

Year: 2025 Journal: Circuits Systems and Signal Processing Vol: 44 (5)Pages: 3388-3409 Publisher: Birkhäuser

DOI: 10.1007/s00034-024-02968-9

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Keywords:

Field-programmable gate array Convolutional neural network Computer science Embedded system Artificial neural network Computer architecture Computer hardware Artificial intelligence

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Advanced Neural Network Applications

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

Industrial Vision Systems and Defect Detection

Physical Sciences → Engineering → Industrial and Manufacturing Engineering

CCD and CMOS Imaging Sensors

Physical Sciences → Engineering → Electrical and Electronic Engineering

An FPGA-Based Reconfigurable Convolutional Neural Network Accelerator for Tiny YOLO-V3

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