GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications

Zhou Wang; Haochen Du; Jiuren Zhou; Yang Zhou; Xiaonan Tang; Tianchun Ye; Shaojun Wei; Shushan Qiao; Shouyi Yin

doi:10.1109/apccas62602.2024.10808289

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GRS: A General RISC-V SIMD Vector Acceleration Processor for Artificial Intelligence Applications

Zhou Wang Haochen Du Jiuren Zhou Yang Zhou Xiaonan Tang Tianchun Ye Shaojun Wei Shushan Qiao Shouyi Yin

Year: 2024 Pages: 702-706

DOI: 10.1109/apccas62602.2024.10808289

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Keywords:

SIMD Acceleration Computer science Reduced instruction set computing Parallel computing Vector processor Computational science Instruction set Physics

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