A Hardware Security Evaluation Platform on RISC-V SoC

Xiaolong Cheng; Aijiao Cui; Yier Jin

doi:10.1109/itc-asia62534.2024.10661352

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JOURNAL ARTICLE

A Hardware Security Evaluation Platform on RISC-V SoC

Xiaolong Cheng Aijiao Cui Yier Jin

Year: 2024 Pages: 1-6

DOI: 10.1109/itc-asia62534.2024.10661352

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Keywords:

Computer science Embedded system Hardware security module System on a chip Reduced instruction set computing Computer hardware Computer architecture Cryptography Instruction set Computer security

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0.79

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Topics

Physical Unclonable Functions (PUFs) and Hardware Security

Physical Sciences → Computer Science → Hardware and Architecture

Security and Verification in Computing

Physical Sciences → Computer Science → Artificial Intelligence

Cryptographic Implementations and Security

Physical Sciences → Computer Science → Artificial Intelligence

A Hardware Security Evaluation Platform on RISC-V SoC

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Citation History

Topics

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