An Efficient FPGA-Based Dilated and Transposed Convolutional Neural Network Accelerator

Tsung-Hsi Wu; Chang Shu; Tsung-Te Liu

doi:10.1109/tcsi.2024.3428636

ScienceGate Book Chapters

JOURNAL ARTICLE

An Efficient FPGA-Based Dilated and Transposed Convolutional Neural Network Accelerator

Tsung-Hsi Wu Chang Shu Tsung-Te Liu

Year: 2024 Journal: IEEE Transactions on Circuits and Systems I Regular Papers Vol: 71 (11)Pages: 5178-5186 Publisher: Institute of Electrical and Electronics Engineers

DOI: 10.1109/tcsi.2024.3428636

Get Full-Text PDF Get Analytical Report

Keywords:

Field-programmable gate array Convolutional neural network Computer science Artificial neural network Computer hardware Artificial intelligence

Metrics

Cited By

2.56

FWCI (Field Weighted Citation Impact)

Refs

0.86

Citation Normalized Percentile

Is in top 1%

Is in top 10%

Citation History

Topics

Neural Networks and Applications

Physical Sciences → Computer Science → Artificial Intelligence

Advanced Algorithms and Applications

Physical Sciences → Engineering → Control and Systems Engineering

Image Processing Techniques and Applications

Physical Sciences → Engineering → Media Technology

An Efficient FPGA-Based Dilated and Transposed Convolutional Neural Network Accelerator

Metrics

Citation History

Topics

Related Documents

An FPGA-Based Computation-Efficient Convolutional Neural Network Accelerator

An Efficient Convolutional Neural Network Accelerator on FPGA

FPGA-based Accelerator for Convolutional Neural Network

Frameworks for Efficient Convolutional Neural Network Accelerator on FPGA

An Efficient Convolutional Neural Network Accelerator on FPGA Platform