Design and Synthesis of RISC-V Bit Manipulation Extensions

Abstract

This paper presents the design, verification, and synthesis results of a bit manipulation unit on a RISC-V processor. We assess area and timing tradeoffs of the additional hardware on a configurable, open-source processor. Supporting bit manipulation has no impact on the critical path of an application processor. It adds 1-2.5% to total area, or less than 1% without carry-less multiplication.