JOURNAL ARTICLE

Energy-Efficient Cryptographic Acceleration using Hardware-Software Co-Design with RISC-V

Abstract

Recent growth in the Internet of Things (IoT) has not only enabled novel applications but also led to new security concerns. Majority of IoT devices are resource-constrained em-bedded systems which make it prohibitively difficult to implement computationally complex cryptographic algorithms and security protocols in software. We demonstrate energy-efficient hardware accelerators for elliptic curve cryptography, lattice-based cryp-tography and pairing-based cryptography integrated with open-source RISC-V micro-processor to achieve up to two orders of magnitude improvement in energy-efficiency and performance through hardware-software co-design.

Keywords:
Computer science Cryptography Reduced instruction set computing Embedded system Cryptographic primitive Acceleration Hardware acceleration Software Cryptographic protocol Computer hardware Instruction set Operating system Computer security Field-programmable gate array Physics

Metrics

1
Cited By
0.26
FWCI (Field Weighted Citation Impact)
15
Refs
0.61
Citation Normalized Percentile
Is in top 1%
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Citation History

Topics

Cryptographic Implementations and Security
Physical Sciences →  Computer Science →  Artificial Intelligence
Chaos-based Image/Signal Encryption
Physical Sciences →  Computer Science →  Computer Vision and Pattern Recognition
Quantum Computing Algorithms and Architecture
Physical Sciences →  Computer Science →  Artificial Intelligence
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