Ethernet Emulation over PCIe for RISC-V Software Development Vehicles

Abstract

This paper describes two different approaches to emulate an Ethernet communication link between a host computer and a RISC-V multiprocessor system running on a FPGA accelerator by using PCIe as the real communication link. Two approaches are tested, one based on user-level applications using TUN/TAP drivers and another based on implemented kernel-mode drivers on the Linux Operation System. We have functionally validated the approaches in multiple RISC-V systems and measured the achieved performance. A maximum bandwidth of 32.5 Mbps has been achieved in a Lagarto Hun system running at 100 Mhz.