Graph Theory Based Machine Learning for Analog Circuit Design

Abstract

Despite the availability of electronic design automation (EDA) tools, the design of analog circuits is still a complex process that requires a high level of expertise in circuit parameterization and topological optimization. In recent years, researchers have increasingly applied artificial intelligence (AI) to assist circuit design while employing simulations to evaluate the circuit performance. This is time consuming due to the time-domain simulation processes and the lack of using existing knowledge. To address these issues, we propose a graph theory based machine learning framework for analog circuits design automation. Specifically, we employ graph theory to evaluate the circuit transfer function and thus to avoid time-domain simulations, as well as for AI to accommodate circuit topology variations in addition to parameter optimization. For this, we develop a graph-based coding method to represent the circuit topology and thereby a parameter-topology optimizing algorithm to evolve the circuit. Experimental results show that this method efficiently generates high-quality circuits and offers multiple choices of candidate EDA topologies for practical implementations.