Neuromorphic Accelerator for Spiking Neural Network Using SOT-MRAM Crossbar Array

Abstract

Spiking neural networks (SNNs) have gained a significant interest in recent years due to their biological system-like processing. However, the hardware implementation of spiking neurons, synapses, and related algorithms by CMOS technology is limited by area and power constraints. In this work, an approach for spin-orbit-torque magnetic random access memory (SOT-MRAM)-based hardware accelerator for SNNs is presented. The accelerator for the neuromorphic core consists of crossbar arrays of SOT-MRAM devices interfaced with spiking neurons and peripheral circuits. The proposed design is compared with various other nonvolatile memory devices, including phase-change memory (PCM), resistive random access memory (RRAM), and spin-transfer torque MRAM (STT-MRAM). SOT-MRAM provides subnanosecond switching with low energy consumption and high throughput. The benefits of the proposed design for a large-scale neuromorphic accelerator are explored using a complete device-circuit-algorithm framework for a standard MNIST image classification. The results show that SOT-MRAM-based neuromorphic core achieves $6.4\times $ , $70.32\times $ , $20.25\times $ , and $4.83\times $ higher throughput per unit Watt as compared to SRAM, PCM, RRAM, and STT-MRAM-based designs, respectively.