JOURNAL ARTICLE

ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs

Dipika DebJohn Jose

Year: 2023 Journal:   ACM Transactions on Embedded Computing Systems Vol: 22 (5s)Pages: 1-25   Publisher: Association for Computing Machinery

Abstract

Data prefetching efficiently reduces the memory access latency in NUCA architectures as the Last Level Cache (LLC) is shared and distributed across multiple cores. But cache pollution generated by prefetcher reduces its efficiency by causing contention for shared resources such as LLC and the underlying network. The paper proposes Zero Pollution Prefetcher (ZPP) that eliminates cache pollution for NUCA architecture. For this purpose, ZPP uses L1 prefetcher and places the prefetched blocks in the data locations of LLC where modified blocks are stored. Since modified blocks in LLC are stale and request for such blocks are served from the exclusively owned private cache, their space unnecessary consumes power to maintain such stale data in the cache. The benefits of ZPP are (a) Eliminates cache pollution in L1 and LLC by storing prefetched blocks in LLC locations where stale blocks are stored. (b) Insufficient cache space is solved by placing prefetched blocks in LLC as LLCs are larger in size than L1 cache. This helps in prefetching more cache blocks, thereby increasing prefetch aggressiveness. (c) Increasing prefetch aggressiveness increases its coverage. (d) It also maintains an equivalent lookup latency to L1 cache for prefetched blocks. Experimentally it has been found that ZPP increases weighted speedup by 2.19x as compared to a system with no prefetching while prefetch coverage and prefetch accuracy increases by 50%, and 12%, respectively compared to the baseline. 1

Keywords:
Instruction prefetch Cache Computer science Cache pollution Cache algorithms Page cache Smart Cache Parallel computing Cache invalidation Cache coloring Speedup Latency (audio) CPU cache Operating system Embedded system Telecommunications

Metrics

2
Cited By
0.88
FWCI (Field Weighted Citation Impact)
31
Refs
0.62
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

Interconnection Networks and Systems
Physical Sciences →  Computer Science →  Computer Networks and Communications
Parallel Computing and Optimization Techniques
Physical Sciences →  Computer Science →  Hardware and Architecture
Advanced Memory and Neural Computing
Physical Sciences →  Engineering →  Electrical and Electronic Engineering

Related Documents

JOURNAL ARTICLE

Dynamic First Access Isolation Cache to Eliminate Reuse-Based Cache Side Channel Attacks

Chong WangHong YuShuai WeiKe Song

Journal:   Journal of Circuits Systems and Computers Year: 2022 Vol: 32 (02)
JOURNAL ARTICLE

Cache timing attacks on NoC-based MPSoCs

Cezar ReinbrechtBruno ForlinJohanna Sepúlveda

Journal:   Microprocessors and Microsystems Year: 2019 Vol: 66 Pages: 1-9
JOURNAL ARTICLE

Dynamic Partitioned Cache Memory for Real-Time MPSoCs with Mixed Criticality

Gang ChenKai HuangLong ChengBiao HuAlois Knoll

Journal:   Journal of Circuits Systems and Computers Year: 2016 Vol: 25 (06)Pages: 1650062-1650062
© 2026 ScienceGate Book Chapters — All rights reserved.