Hardware-Aware Zero-Shot Neural Architecture Search

Abstract

Designing a convolutional neural network architecture that achieves low-latency and high accuracy on edge devices with constrained computational resources is a difficult challenge. Neural architecture search (NAS) is used to optimize the architecture in a large design space, but at huge computational cost. As a countermeasure, we use here the zero-shot NAS method. A drawback to the previous method was that a discrepancy of correction occurred between the evaluation score of the neural architecture and its accuracy. To address this problem, we refined the neural architecture search space from previous zero-shot NAS. The neural architecture obtained using the proposed method achieves ImageNet top-1 accuracy of 75.3% under conditions of latency equivalent to MobileNetV2 (ImageNet top-1 accuracy is 71.8%) on the Qualcomm SA8155 platform.