Vertical GeSn gate-all-around (GAA) nanowire nMOSFETs fabricated using a top-down approach are presented. The devices are benchmarked with similar Ge and Ge/GeSn/Ge heterostructure devices to underline the great potential of GeSn for future nMOS devices. Device measurements are performed in the temperature range from 12 K to room temperature (RT, 300 K). At RT the all-GeSn n-MOSFETs show a subthreshold swing (SS) of ∼120 mV/dec that decreases at cryogenic temperatures to a very steep 20mV/dec. The abrupt transition from subthreshold to on-state shows the suitability of GeSn alloys for cryogenic CMOS applications.
Yannik JunkMingshan LiuMarvin FrauenrathJean‐Michel HartmannD. GruetzmacherDan BucaQing‐Tai Zhao
Yannik JunkMingshan LiuMarvin FrauenrathJean‐Michel HartmannD. GruetzmacherDan BucaQing‐Tai Zhao
Bing YangKavitha D. BuddharajuSelin Hwee-Gee TeoJintao FuNavab SinghG. Q. LoDim‐Lee Kwong