RANC: Reconfigurable Architecture for Neuromorphic Computing

Abstract

Neuromorphic architectures have been introduced as platforms for energy\nefficient spiking neural network execution. The massive parallelism offered by\nthese architectures has also triggered interest from non-machine learning\napplication domains. In order to lift the barriers to entry for hardware\ndesigners and application developers we present RANC: a Reconfigurable\nArchitecture for Neuromorphic Computing, an open-source highly flexible\necosystem that enables rapid experimentation with neuromorphic architectures in\nboth software via C++ simulation and hardware via FPGA emulation. We present\nthe utility of the RANC ecosystem by showing its ability to recreate behavior\nof the IBM's TrueNorth and validate with direct comparison to IBM's Compass\nsimulation environment and published literature. RANC allows optimizing\narchitectures based on application insights as well as prototyping future\nneuromorphic architectures that can support new classes of applications\nentirely. We demonstrate the highly parameterized and configurable nature of\nRANC by studying the impact of architectural changes on improving application\nmapping efficiency with quantitative analysis based on Alveo U250 FPGA. We\npresent post routing resource usage and throughput analysis across\nimplementations of Synthetic Aperture Radar classification and Vector Matrix\nMultiplication applications, and demonstrate a neuromorphic architecture that\nscales to emulating 259K distinct neurons and 73.3M distinct synapses.\n