A continuous-time, clockless analog correlator uses pulse-position-encoded analog signal processing with VCOs as integrators and pulse-controlled relaxation delays; it operates as a matched filter to despread asynchronous wake-up codes. A correlator prototype has been designed in 65nm CMOS-LP technology, consumes 37nW from 0.54V, and performs code-domain filtering with an 11-bit Barker code for a wake-up receiver. The hardware of the proposed n-bit correlator architecture scales with O(n) compared to O(n 2 ) for asynchronous switched-capacitor correlators. A -80.9dBm 40nW wake-up receiver with 9dB better sensitivity and 3dB improved selectivity to AM interference thanks to the correlator is demonstrated.
Seunghyun OhNathan E. RobertsDavid D. Wentzloff
Alin RatiuDominique MorcheBruno AllardXuefang Lin-ShiJacques Verdier