JOURNAL ARTICLE

Composite FPGA-based Accelerator for Deep Convolutional Neural Networks

Abstract

Convolutional neural network (CNN) can achieve high prediction accuracy while they built complex models; however, high power consumption, memory demands, and bandwidth resource consumption by the models are creating enormous challenges in their actual deployment. To achieve the rapid prediction capabilities of high-precision models, a modified convolutional neural network model based on the GoogLeNet model has been proposed in this work, and a composite-structure convolutional neural network hardware accelerator compatible with the parallel computing model has been designed. An experimental model based the modified structure has been established and CIFAR-10 dataset was used to evaluate the prediction accuracy. The accelerator achieved 663 FPS peak performance with a 9.06% error rate, and was implemented on a Xilinx VC709. Compared to CPU and GPU, its energy efficiency increased by a factor of 7.1 and 1.9, respectively, achieving a high-precision complex network computing acceleration.

Keywords:
Convolutional neural network Computer science Field-programmable gate array Artificial neural network Software deployment Hardware acceleration Acceleration Bandwidth (computing) Energy consumption Computer engineering Deep learning Embedded system Artificial intelligence Operating system Engineering Computer network

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Citation History

Topics

Advanced Neural Network Applications
Physical Sciences →  Computer Science →  Computer Vision and Pattern Recognition
Advanced Memory and Neural Computing
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
CCD and CMOS Imaging Sensors
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
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