PACIFIC: The Readout ASIC for the LHCb Scintillating Fibre Tracker

Abstract

The LHCb detector will undergo a major upgrade during the Long Shutdown 2 (LS2) of the LHC, including the full replacement of the main tracking system. The new tracker will use scintillating fibres to cover the complete area of the detector. Arrays of silicon photomultipliers (SiPMs) will be used to readout these fibres. Each array has 128 channels and is read out by the low-power ASIC PACIFIC specifically developed for this purpose. Each of the 64 channels of this ASIC comprise analog processing, digitization, slow control and digital output at a rate of 40 MHz. The analog processing consists of a preamplifier, shaper and integrator. An interleaved double gated integrator avoids dead time as one integrator is in reset while the other collects the signal. The two integrator outputs are merged by a track and hold to provide a continuous measurement. The output voltage is digitized using 3 comparators acting like a non-linear flash ADC. The three bits output is encoded into two bits and serialized (joining several channels). The design is complemented by auxiliary blocks such as voltage and current references, control DACs, power on reset (POR) circuitry and serializers. The slow control digital block consists in a 10 bit addressing I2C slave and a register bank for holding the configuration values. The PACIFIC ASIC has been designed using a 130 nm technology and several prototypes have been validated. The recently tested PACIFICr5 is expected to be the final version. Compared to its predecessor the PACIFICr4b, only minor changes were applied to the analog channel, some features added and the channel output switched from a single-ended to a differential link which serializes the data at 320 MHz.