On-Device Learning in Memristor Spiking Neural Networks

Abstract

In this paper, a memristor spiking neuron and synaptic trace circuits for efficient on device learning are presented. A key feature of these circuits is the use of memristors to emulate the membrane potential of spiking neurons, as opposed to the conventional use of a capacitor. The circuits are designed in IBM 65nm technology node and validated on a small-scale spiking neural network. It was observed that a 3×3 spiking neural network consumes 19.1 μW of power at 100 MHz.