VLSI core architecture for GF(p) elliptic curve crypto processor

Abstract

A novel GF(p) crypto processor core architecture is presented in this paper. The core is used to implement a GF(p) elliptic curve cryptosystem (ECC). The architecture is such that a single core can be used to implement ECC or alternatively a two core solution can be adopted. As a result, the core architecture allows the exploitation of the parallelism that exists in elliptic curve point addition and doubling. The core architecture results in several advantages over conventional implementations with regard to speed and power consumption.