Selective GeO<inf>x</inf>-scavenging from interfacial layer on Si<inf>1−x</inf>Ge<inf>x</inf> channel for high mobility Si/Si<inf>1−x</inf>Ge<inf>x</inf> CMOS application

Abstract

We demonstrate a technique for selective GeO _x -scavenging which creates a GeO _x -free IL on Si _1-x Ge _x substrates. This process reduces N _it by >60% to 2e11 and increases high-field mobility at N _inv =1e13 cm ^-2 by ~1.3× in Si _0.6 Ge _0.4 pFETs with sub-nm EOT.