Abstract

We report a hermetic thin film packaging on aluminum nitride AlN RF MEMS platforms that is entirely CMOS compatible and wafer level executed. The process flow, including release of multiple free-moving body and encapsulation of the functional structures are demonstrated using 8" wafer level thin film micromachining technology. The encapsulated devices are reported to survive post CMOS assembly processes such as wafer level dicing and flip-chip bonding. Both fabrication outcome and measurement results indicate high possibility in cost effective and footprint reduction in MEMS integration technology.

Keywords:
Wafer dicing Microelectromechanical systems Wafer Die preparation Materials science Wafer-level packaging Wafer-scale integration Surface micromachining Optoelectronics Fabrication Flip chip CMOS Wafer bonding Footprint Wafer testing Wafer backgrinding Nanotechnology Adhesive Layer (electronics)

Metrics

4
Cited By
0.32
FWCI (Field Weighted Citation Impact)
6
Refs
0.67
Citation Normalized Percentile
Is in top 1%
Is in top 10%

Citation History

Topics

Advanced MEMS and NEMS Technologies
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
3D IC and TSV technologies
Physical Sciences →  Engineering →  Electrical and Electronic Engineering
Adhesion, Friction, and Surface Interactions
Physical Sciences →  Engineering →  Mechanics of Materials

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