A Fully‐Integrated Low‐Power Analog Front‐End for ZigBee Transmitter Applications

Abstract

A low-power high-linearity Analog frontend (AFE) composed by a Digital-to-analog converter (DAC) and a Low-pass filter (LPF) is proposed in this paper for ZigBee transmitter applications. The DAC is realized by current-steering topology which adopts an optimized segmentation method to resolve the contradiction between requirements of linearity and power. A Successive approximation register (SAR) frequency auto-tuning operation is presented for the LPF to accommodate the performance deterioration due to the Process, voltage and temperature (PVT) variations. Implemented in a 0.13μm CMOS technology, the proposed AFE has been fully integrated in a ZigBee transceiver chip with an area of 1.23mm2. The experimental results demonstrate that it achieves a linearity of 30dBm Output 3rd order intercept point (OIP3) and dissipates 4.75mA from a 1.2V supply.