On the Design of a Real-Time Volume Rendering Engine

Jaap Smit; N. J. Wessels; Astrid van der Horst; Marinus Jan Bentum

doi:10.2312/eggh/eggh92/070-076

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On the Design of a Real-Time Volume Rendering Engine

Jaap Smit N. J. Wessels Astrid van der Horst Marinus Jan Bentum

Year: 1992

DOI: 10.2312/eggh/eggh92/070-076

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Abstract

An architecture for a Real-Time Volume Rendering Engine is given capable of computing750x750x512 samples from a 3D dataset at a rate of 25 images per second.The RT-VRE uses for this purpose 64 dedicated rendering chips, cooperating with 16RISe-processors. An plane interpolator circuit and a composition circuit, both capableto operate at very high speeds, have been designed for a 1.6 micron VLSI process.The interpolator is now back from production. It has been tested an complied withour specifications."

Keywords:

Rendering (computer graphics) Computer science Real-time rendering Very-large-scale integration Computer graphics (images) Computer hardware Volume rendering Embedded system

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Computer Graphics and Visualization Techniques

Physical Sciences → Computer Science → Computer Graphics and Computer-Aided Design

Advanced Vision and Imaging

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

Medical Image Segmentation Techniques

Physical Sciences → Computer Science → Computer Vision and Pattern Recognition

On the Design of a Real-Time Volume Rendering Engine

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