Implementation Of Secured Mips Pipeline Processor Using Rc6 Algorithm With Vhdl

Abstract

This paper presents the design and implementation of a RC6 algorithms based Crypto Processor containing both encryption and decryption processes in the same design. The Crypto Processor architecture is divided into different modules and every module is implemented individually. The hardware design is implemented using Xilinx devices. The main parts of ALU module and Permutation Module in HDL descriptions are related with the transformations of Rivest Cipher-6 crypto algorithm, are compiled into hardware using the Xilinx and HDL EASE tool. Testing results shows that the MIPS crypto processor operates successfully.