A Low Noise Pixel Architecture for Scientific CMOS Monolithic Active Pixel Sensors

Abstract

This paper presents the design and characterisation of FORTIS (4T Test Image Sensor), which is a low noise, CMOS monolithic active pixel sensor for scientific applications. The pixels present in FORTIS are based around the four transistor (4T) pixel architecture, which is already widely used in the commercial imaging community. The sensor design contains thirteen different variants of the 4T pixel architecture to investigate the effects of changing its core parameters. The variants include differences in the pixel pitch, the diode size, the in-pixel source follower, and the capacitance of the floating diffusion node (the input node of the in-pixel source follower). Processing variations have also been studied, which include varying the resistivity of the epitaxial layer and investigating the effects of a special deep p-well layer. By varying these parameters, the 4T pixel architecture can be optimised for scientific applications where detection of small amounts of charge is required.