Implementation of multipurpose VLSI filters for HDTV codecs

Abstract

A VLSI implementation of fast pipelined 2-D transversal filters is presented. The purpose of these filters is to compute a subband decomposition to allow further data compression. The architectures are dedicated to the CCIR 601 format. They are used at several places in the system. The filters can operate at a 200-MHz clock frequency. They were implemented in a 1.2- mu m CMOS technology. The principles used as well as the logic family investigated show a direct application for HDTV.< >