Advanced single-chip signal processor

Abstract

A CMOS single chip signal processor, which has 32-bit floating point arithmetic units and large capacity on-chip memories, has been developed. The processor, having a floating point parallel multiplier, a floating point accumulator, two 512- word data RAMs, a 1024-word data ROM and a 2048- word program ROM, is implemented within a 15.4 × 8.4 mm chip area, containing 370,000 elements. As the processor is designed to perform highly accurate multiply-accumulate operations for digital filtering and to attain complex addressing capability for FFT computation, this processor can execute FIR computation at the 150 nsec per tap rate, as well as achieve 1024 point complex FFT computation in 12.3 msec.