A reconfigurable multi-chip analog neural network: recognition and back-propagation training

Abstract

A multi-chip analog neural network system capable of prototyping networks with as many as 81920 synaptic connections and 1024 neurons is described. The neural network architecture is reconfigurable by routing all neuron activation values through a host computer which can re-map the network connectivity by changing a look-up table in memory. Once a network is successfully prototyped, it is hardwired and embedded in an application to take full advantage of the performance that the electrically trainable analog neural network (ETANN) chips provide. A multi-layer, multi-chip neural network containing 12660 synaptic connections designed for a pattern recognition application is described along with results. Constraints on network topologies associated with the busing architecture chosen and simulation of this multi-chip system are discussed.< >