RFIC design using low-voltage nanometer CMOS technologies offers both advantages and challenges. This paper describes the limitations of using these technologies in receiver front-end design and proposes circuit solutions. Several techniques such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are reviewed and employed. A receiver front-end that covers 700 MHz-6 Ghz and supports the WiMAX/LTE standards is designed based on these circuit solutions. The front-end is designed using 1.2 V 90 nm CMOS and consumes a total power of 10.2 mW. The total gain is 32 dB, noise figure is 4 dB, flicker noise corner is 10 kHz, and third order intercept point is -10 dBm/0 dBm.
Sher FangF. DulgerA. BellaouarM.F. Frechétte
Ryuji InagakiTai TanakaMasaomi TsuruEiji TaniguchiHisao FukumotoSuguru KamedaNoriharu SuematsuAkinori TairaT. TakagiK. Tsubouchi
Karen ScheirStephane BronckersJonathan BorremansP. WambacqYves Rolain
Jad G. AtallahSaul RodriguezLirong ZhengM. Ismail