JOURNAL ARTICLE
A ternary flip-flop circuit
Year: 1975 Journal: International Journal of Electronics Vol: 38 (1)Pages: 41-47 Publisher: Taylor & Francis
Abstract
The paper describes a Ternary flip-flop. The output is obtained in the form of three: levels of voltage corresponding to logic status 2, 1, 0, when triggered by 1 kHZ pulses.
Keywords:
Flip-flop Ternary operation Voltage Materials science Electrical engineering Electronic engineering Optoelectronics Computer science Engineering CMOS
Metrics
6
Cited By
0.53
FWCI (Field Weighted Citation Impact)
5
Refs
0.69
Citation Normalized Percentile
Is in top 1%
Is in top 10%
Citation History
Topics
Analog and Mixed-Signal Circuit Design
Physical Sciences → Engineering → Biomedical Engineering
Quantum Computing Algorithms and Architecture
Physical Sciences → Computer Science → Artificial Intelligence
Neural Networks and Applications
Physical Sciences → Computer Science → Artificial Intelligence
Related Documents
JOURNAL ARTICLE
Novel ternary JKL flip-flop
Journal: Electronics Letters Year: 1990 Vol: 26 (15)Pages: 1145-1146
JOURNAL ARTICLE
A SIMPLE FLIP‐FLOP CIRCUIT
Derek P. HendryArthur M. Perry
Journal: Journal of the Experimental Analysis of Behavior Year: 1962 Vol: 5 (4)Pages: 442-442
JOURNAL ARTICLE
An integrated JK flip-flop circuit
Journal: IEEE Journal of Solid-State Circuits Year: 1977 Vol: 12 (4)Pages: 403-406
JOURNAL ARTICLE
Flip-flop resolving time test circuit
Fred U. RosenbergerT.J. Chaney
Journal: IEEE Journal of Solid-State Circuits Year: 1982 Vol: 17 (4)Pages: 731-738
JOURNAL ARTICLE
Controlled stability of flip-flop circuit
T.O.J. StutzAnke-Susanne Müller
Journal: IEEE Journal of Solid-State Circuits Year: 1972 Vol: 7 (2)Pages: 211-212