<title>Image Processing System With Time Shared Multiframe Data Bus Architecture: MFIP</title>

Abstract

A general purpose, high-speed image processing system with a time shared multiframe data bus architecture and with multi-processors--MFIP--has been developed. Massive image data can be transferred from/to multiple memory modules to/from multi-processors through the high-speed time shared multiframe data bus (40 MW/sec). The system is built up, centering on 2MW large image memory consisting of eight memory modules with 256KW (1W = 16 bits). Image memory can be expanded up to 8MW, i.e., 32 memory modules. This paper describes the gross architecture of MFIP, and functional and operational features of the high-speed time shared multiframe data bus. Then design concept and manufacture of two image processing units, A and B in the system are presented.