A 20-Gb/s optical receiver with integrated photo detector in 40-nm CMOS

Abstract

This paper presents a 20-Gb/s monolithically integrated CMOS optical receiver, integrating a photo detector, a transimpedance amplifier, and a post limiting amplifier on a single chip. Incorporating a 2-D meshed spatially-modulated light detector, the optical receiver achieves a record-high speed and is capable of delivering 80-dBΩ conversion gain when driving 50-Ω output loads. Nested-feedback topologies are adopted for transimpedance and post limiting amplifier design to achieve broad-band and high-gain operations without shunt-peaking inductors. Implemented in a generic 40-nm CMOS technology, the chip size is 0.6 × 0.54 mm. This receiver core drains 30 mW from 1-V supply.