ViPro: Focal-Plane Spatially-Oversampling CMOS Image Compression Sensor

Abstract

The CMOS image sensor computes spatially-compressing convolutional transforms directly on the focal plane, yielding digital output at a rate proportional to the mere information rate of the video. A bank of column-parallel DeltaSigma-modulated analog-to-digital converters (ADCs) performs distributed columnwise focal-plane oversampling of a set of adjacent pixels and concurrent weighted average quantization. The number of samples per pixel and switched capacitor sampling sequence order set the amplitude and sign of the respective pixel coefficient. Outputs of a set of adjacent ADCs are accumulated to realize a two-dimensional block matrix transform in parallel for all columns. The 3.1 mm times 1.9 mm prototype, ViPro, containing a 128times128 active pixel array and a bank of 128 hybrid algorithmic DeltaSigma-modulated ADCs yields 4 GMACS (multiply-and-accumulates per second) computational throughput in real-time discrete cosine transform (DCT) video compression when scaled to HDTV 1080i resolution