Shigehiro MiyatakeKouichi IshidaTakashi MorimotoYasuo MasakiHideki Tanabe
This paper presents a CMOS active pixel image sensor (APS) with a transversal readout architecture that eliminates the vertically striped fixed pattern noise (FPN). There are two kinds of FPNs for CMOS APSs. One originates form the pixel- to-pixel variation in dark current and source-follower threshold voltage, and the other from the column-to-column variation in column readout structures. The former may become invisible in the future due to process improvements. However, the latter, which result sin a vertically striped FPN, is and will be conspicuous without some subtraction because of the correlation in the vertical direction. The pixel consists of a photodiode, a row- and a column-reset transistor, a source follower input transistor, and a column-select transistor instead of the row-select transistor in conventional CMOS APSs. The column-select transistor is connected to a signal line, which runs horizontally instead of vertically. Every horizontal signal line is merged into a single vertical signal line via a row- select transistor, which can be made large enough to make its on-resistence variation negligible because of its low driving frequency. Therefore, the sensor has neither a vertical nor horizontal stripe FPN.
S. MiyatakeM. MiyamotoK. IshidaTatsuki MorimotoMasaki YasugiHiroshi Tanabe
Terence KwokJoe ZhongTimothy D. WilkinsonW. A. Crossland
Tsung-Hsun TsaiRichard Hornsey
S. MendisSabrina E. KemenyEric R. Fossum
Aicha MenssouriKarim El KhadiriAhmed Tahiri