This paper addresses the analysis and design of a fully integrated CMOS RF front-end suitable for a general analog interface to be employed in mixed-signal SOC applications. This block must relocate an input analog signal to a fixed frequency band and provide a gain control to adjust the input signal dynamic range, so that the mixed-signal stage can process this translated input signal version. A dual-conversion heterodyne architecture suitable for this application is presented and implemented in IBM 0.18μm CMOS process. Simulation results show a sensitivity of -70dBm, an IIP3 of -28dBm, and a NF of 25dB with a power of 55mW and area of 0.77mm2.
Jiawei ZhengWing‐Hung KiChi-Ying Tsui
Haryong SongYunjong ParkHyungseup KimHyoungho Ko
Wei-Zen ChenYing-Lien ChengDa-Shin Lin
Andreas WiesbauerMartin ClaraM. HarteneckT. PotscherB. SegerChristoph SandnerC. Fleischhacker