Concurrent Viterbi Algorithm With Trace-Back

Abstract

It is shown how the Viterbi algorithm and the Fast Fourier Transform can be described in terms of the same graph topology and different algebraic kernels. This similarity is exploited to show how a network of 2n processors, interconnected as an n-dimensional cube and with no shared memory, can be efficiently used to implement a concurrent Viterbi algorithm. The modularity of this approach allows the decoding of large constraint length codes with multi-chip VLSI systems operating at different degrees of parallelism. The interprocessor communication overhead is minimized by using the trace-back method, which completely avoids any survivor exchange or any global memory operation. Results are presented on the efficiency achieved for codes with constraint length up to 15 on a general purpose hypercube computer, and comparisons are made with other parallel architectures.