Low-power integrable paging receiver architecture

Abstract

A receiver architecture is described that is ideally suited to UK paging applications. The receiver is similar to a direct conversion receiver, in that the absence of an ‘image’ response allows integration, but it only requires a single front-end mixer and so consumes less power. To achieve this the local oscillator frequency is offset slightly from the incoming carrier frequency, allowing the modulation to be recovered by a straightforward discriminator. Extensive measurements show that a bit error rate of 0.01 can be obtained with a 12 dB IF S/N ratio. Noise-generated DC is identified as having a major impact on the receiver performance, and is shown to be determined by the IF noise spectrum. The degradation of sensitivity caused by various tolerances is considered, and the best nominal parameter values selected.