Trans-capacitance modeling in junctionless gate-all-around nanowire FETs

Farzan Jazaeri; Lucian Barbut; Jean-Michel Sallèse

doi:10.1016/j.sse.2014.04.022

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Trans-capacitance modeling in junctionless gate-all-around nanowire FETs

Farzan Jazaeri Lucian Barbut Jean-Michel Sallèse

Year: 2014 Journal: Solid-State Electronics Vol: 96 Pages: 34-37 Publisher: Elsevier BV

DOI: 10.1016/j.sse.2014.04.022

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Keywords:

Nanowire Capacitance Field-effect transistor Transistor Materials science Equivalence (formal languages) Optoelectronics Electronic circuit Scheme (mathematics) Electronic engineering Computer science Nanotechnology Physics Electrical engineering Engineering Electrode Mathematics Voltage

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Advancements in Semiconductor Devices and Circuit Design

Physical Sciences → Engineering → Electrical and Electronic Engineering

Semiconductor materials and devices

Physical Sciences → Engineering → Electrical and Electronic Engineering

Nanowire Synthesis and Applications

Physical Sciences → Engineering → Biomedical Engineering

Trans-capacitance modeling in junctionless gate-all-around nanowire FETs

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