Low Noise Charge Sensitive Amplifier with Low Input Impedance

Abstract

This amplifier was designed for use in a large array of proportional wire chambers with charge division readout and for cathode readout of proportional chambers. The single stage high gain (104) amplifier with FET input has low component count, low cost, and a high packing density of 32 channels per double-sided P. C. board. Edge connectors are used for input, output, power and calibration signals. The on-board calibration system drives two independent groups of amplifiers through a range which is proportional to a distributed DC level over 3 orders of magnitude. The input and output signals are differentially driven for optimum noise rejection and interchannel isolation.